Hi,
I'm still stuck with the problem below. I tried to
consult the GNU Make Manual ("secondary expansion",
"eval", and SHELL), but I couldn't "make" it to work.
Any idea?
Thanks,
Uri
> Hi,
>
> I would like to write the main makefile of
> Multi-arch,
> Multi-modules project.
>
> What I wrote in order to run all dependent makefile
> is:
>
>
> MAKEDIRS = \
> $(UTILS_MODULE)/build/sms1000 \
> $(DVB_H_HANDOVER_MODULE)/build/sms1000 \
>
>
>
> .PHONY: test1
> test1: CreateMasterParamFile
> @echo **** TEST ****
> $(foreach dir, $(MAKEDIRS), $(MAKE) clean -C
> $(dir);)
>
> This makefile segment will work well in UNIX based
> OS,
> but not in win32, because the ";" (semicolon) is a
> delimiter between two UNIX shell commands, but not
> in
> dos (where is maybe should be "&&" but you can't put
> this in the makefile)
>
> So, my questions are: -
> 1) How do you write such makefile segment for
> dos/win32?
> 2) Is it possible two write the same makefile for
> both
> (UNIX/win32) without any penalty at execution time?
>
>
> Thanks,
>
> Uri
>
>
>
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