The problem seems to be with the Make version I was using: 3.8.1 seems to be ok.
Best regards, -Arun. > Greetings, > > Following is a make file I am using to understand the usage of teh call > and eval functions. Based on what I understand from the manual, the > PROGRAM_template function should get called, and the target program1 > should be built. When I execute this, the debug prints (from $(warning > ...) ) get called, but the rule to make target is still not found: > > Makefile:13: target=program1 OBJS=$(program1_OBJS) > Makefile:14: target=program1 OBJS=$(program1_OBJS) > Makefile:15: target=program1 OBJS=$(program1_OBJS) > Makefile:16: target=program1 OBJS=$(program1_OBJS) > make: *** No rule to make target `program1', needed by `all'. Stop. > > Can anyone help? > > Best regards, > -Arun. > > > ----------------------------------------------------------------------------------- > PROGRAMS = program1 > > program1_OBJS = program11.o program12.o > > .PHONY: all > all: $(PROGRAMS) > > define PROGRAM_template > $(warning target=$(1) OBJS=$$($(1)_OBJS)) > $(1): $$($(1)_OBJS) > @echo cc -g -o $@ $^ > endef > > $(foreach prog,$(PROGRAMS),$(eval $(call PROGRAM_template,$(prog)))) > $(foreach prog,$(PROGRAMS),$(call PROGRAM_template,$(prog))) > $(eval $(call PROGRAM_template,program1)) > $(call PROGRAM_template,program1) > ----------------------------------------------------------------------------------- > > > _______________________________________________ > Help-make mailing list > [email protected] > http://lists.gnu.org/mailman/listinfo/help-make > > > _______________________________________________ Help-make mailing list [email protected] http://lists.gnu.org/mailman/listinfo/help-make
