Hi!
I have a problem where a macro cause unexpected behaviour. I'm having
a hard time figuring out what is really going on, because "make -w -d"
does not give me any useful information.
Consider this almost canonical makefile describing the problem:
# ------------------------------------------------------------------------
# SampleMakefile
# execute with:
# touch hello hello.a hello.b
# module=no make -f SampleMakefile
A = `test .$module = .yes && echo .a || echo .b`
B = hello$(A)
C = hello
all: $(A)
$(A): $(B)
@echo "Passed"
# ------------------------------------------------------------------------
It results in an error
SampleMakefile:13: target `echo' given more than once in the same rule.
make: *** No rule to make target `hello`test', needed by ``test'. Stop.
However, in my real project "|" is missing, not "hello`test".
What is wrong with this makefile? Is it malformed? Is this a make bug?
My version of make is:
$make -v
GNU Make 3.80
<copyleft cutted>
Thanks for any help!
Rog
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