My build process includes a step which generates multiple output files
from a set of input files and a single command. For example:
a b c d: source
blackbox_generate a b c d # pretend that, for some reason, these
can't be split up.
The problem is that when make realizes it needs to build a, b, c, and d,
it runs the command four times, once for each file it needs. Obviously
this isn't really necessary. Worse than that, when I run it with -j3
it's occasionally causing build problems as three separate versions of
the program attempt to execute at once.
The only solution I came up with was to create a flag file, and change
the dependencies:
a b c d: source.flag
@true
source.flag: source
( touch source.flag && blackbox_generate a b c d ) \
|| ( rm -f source.flag && false ) # eugh
but this is horribly ugly, although it does work. (I think the @true is
necessary but to be honest I'm hazy as to why, although it doesn't
rebuild the things that depend on a b c d without it.)
Is there a good solution to this? Ideally one without extra temporary
files? While I know why the first case doesn't work ("A rule with
multiple targets is equivalent to writing many rules, each with one
target, and all identical aside from that." from 4.10 in the make
manual) I haven't been able to figure out how to get the behavior I want.
Thanks,
-Ben
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