Hi all..
I've got some existing makefiles I'm trying to simplify and we've got a
legacy source tree that has different possible locations for the objects
to be placed after compilation occurs depending on location within the
directory tree, and platform selected, processor, etc.. Our old
Makefiles used a combination of flags to determine where to place the
objects properly.. While it worked fine, it was very busy to look at and
used 40-50 lines to achieve that.
I took a different approach and listed all of the possible paths in a
variable called "OBJDIRS" and wanted to write some makefile 'code' that
could pick out the only one that exists for the directory tree where
Make was invoked from.. Below is what I was trying but found that it
would only return a valid OBJDIR when the valid directory was at the end
of the list (IIRC) or other odd conditions:
OBJDIR =
OBJDIRS := \
../../${proc}/obj/${target) \
../../${target}/obj \
../../obj/${target}
find_files = $(if $(wildcard $(dir)),OBJDIR=${dir})
OBJDIR := $(foreach dir,$(OBJDIRS),$(find_files))
In my example, my source tree where the Makefile is invoked is something
like the following..
~/bydir/build1/base-src/os/src/common
and the objects should end up in :
~/bydir/build1/base-src/os/obj/sun
I'm hoping that Make could look at all of the directories listed in
OBJDIRS and pickout the only valid one that exists (in this case the
directory would be "../../obj/sun").. What am I missing to make this
work or am I expecting too much?
Thanks!
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