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[EMAIL PROTECTED] wrote:
> I'm trying to use macros in this simple project:
>
> .cpp.obj:
>
> g++ $? -o $@
>
>
> Battle: Battle.obj
>
> g++ $? -o $@
>
>
> all: Battle
>
> But the response of make is :
> make: *** No rule to make target `Battle.obj', needed by `Battle'. Stop.
Here are a few pointers:
1. It would be better if you didn't have blank lines between the targets
and the commands. So start by writing the Makefile:
.cpp.obj:
g++ $? -o $@
Battle: Battle.obj
g++ $? -o $@
2. It's probably better to use $< (the name of the first prerequisite)
instead of $? (which is the list of all prerequisites that are newer
than the target). So the Makefile becomes:
.cpp.obj:
g++ $< -o $@
Battle: Battle.obj
g++ $< -o $@
3. When you write .cpp.obj you are writing an 'old style' suffix rule.
GNU Make won't actually do anything with this rule unless you add the
suffixes .cpp and .obj to the list of suffixes it knows about. You do
that by adding to .SUFFIXES.
.SUFFIXES: .cpp .obj
.cpp.obj:
g++ $< -o $@
Battle: Battle.obj
g++ $< -o $@
4. The error you are getting could occur because Battle.cpp is missing.
Make sure that it exists and is present in the current directory.
John.
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