On 31 January 2008 17:21, wdouglass wrote: > Defined in the make system i am working with is the following environment > variable: > > ALL_CFLAGS = -mmcu=$(MCU) -I. $(CFLAGS) $(GENDEPFLAGS) > > Under certain conditions (specifically relative addressing of .c files that > aren't in the same directory as the makefile), Make drops the first part of > this variable, leaving me with just $(CFLAGS) and $(GENDEPFLAGS), and my > compile fails because it doesn't get -mmcu. Has anyone run into a problem > like this?
Nope, but my guess would be that the presence or absence of a path makes a difference in which rule gets invoked to build the .o from the .c file, and this other rule uses $(CFLAGS) $(GENDEPFLAGS) when it should perhaps be using $(ALL_CFLAGS). > if not, does any know any general way of debugging a complex > makefile system? the best i've got is attempting to trace through using > 'make -n' which is tedious and not very helpful. See http://bashdb.sourceforge.net/remake/. cheers, DaveK -- Can't think of a witty .sigline today.... _______________________________________________ Help-make mailing list [email protected] http://lists.gnu.org/mailman/listinfo/help-make
