Hi, I have a makefile including the following prerequisites rule: foo: bar.h where foo.cpp exists in current directory
The additional prerequisite 'bar.h' is being passed as an input file to $(CXX) by the make's implicit rule: $(LINK.cpp) $^ $(LOADLIBES) $(LDLIBS) -o $@ (obtained from make -p) The additional prerequisites are essentially for determining when foo must be rebuilt, but the rule seems peculiar in not stripping out header files. Is there any particular reason? And is the best way to avoid this to provide my own implicit rule instead which filters out words matching %.h from $^ ? TIA --rob _______________________________________________ Help-make mailing list [email protected] http://lists.gnu.org/mailman/listinfo/help-make
