Hi,
I have observed a strange behaviour of make as i tried to create objects from 3
source files and bind them together to an executable. My in-Makefile-defined
CFLAGS variable dissappear
after the creation of first object. Here is my Makefile:
CC=g++
NAME=processor
CFLAGS=-g -Wall
LIB=-lccrtp1
OBJECTS := $(patsubst %.cpp,%.o,$(wildcard *.cpp))
%.o : %.cpp %.h
$(CC) -c $(CFLAGS) $< -o $@
all: $(OBJECTS)
$(CC) -o processor $(CFLAGS) $(LIB) $(OBJECTS)
as i do a make i get this:
g++ -c -g -Wall AudioRecorder.cpp -o AudioRecorder.o
g++ -c -o dmain.o dmain.cpp //
-g -Wall dissappeared ??
g++ -c -o processor.o processor.cpp //
-g -Wall dissappeared ??
g++ -o processor -g -Wall -lccrtp1 AudioRecorder.o dmain.o processor.o
compiler info:
g++ (GCC) 4.1.2 (Gentoo 4.1.2 p1.0.2)
Copyright (C) 2006 Free Software Foundation, Inc.
This is free software; see the source for copying conditions. There is NO
warranty; not even for MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
What causes this behaviour? sth missing in my Makefile?
Thanx in advance,
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