On Wed, Jul 23, 2008 at 10:26 AM, Rinehart, Raleigh <[EMAIL PROTECTED]> wrote: > I'm having a small issue with my builds, specifically the way a variable is > getting expanded. I suspect it is due to make's caching of the directory > contents. > > > > In my makefile I have a variable defined like this: > > > > outfiles = $(wildcard *.out) > > > > which gets used later in the makefile like this: > > > > define artifacts > > @echo moving build artifacts for target $(1) > > @$(MD) output/$(1) > > @echo --- .out files are = $(outfiles) > > -$(CP) $(outfiles) output/$(1) > > … > > endef > > > > > > The artifact macro is in turn called by a build rule as follows: > > > > release: > > @echo -----Release build----- > > @$(MAKE) -f $(makefile_name) clean OBJECTONLY=y > > @$(MAKE) -f $(makefile_name) $(releasedefs) > > $(call artifacts,$@) > > > > The default target builds the .out > > #build phoenix base code > > projectA.out: ../project/src/main.o \ > > $(libraries) \ > > sharedlibs \ > > version > > @echo building $@ > > @echo LD $@ $< > > @$(LD) -Tlink_ram_asic.ld -Map projectA.map -o $@ $< > --start-group $(APPLIBS) $(LIBS) --end-group > > > > Now when I run something like "make release" the out files don't get copied > because the wildcard variable seems to be getting expanded immediately > instead of deferred. > > The echo output is empty --- .out files are = > > So I am missing something completely obvious or what? > > > > > > thanks, > > -raleigh
You'll need double the $ in defines if you're referencing variables outside the scope of the define. I'd read more about second-expansion, et all in the manual. -Garrett _______________________________________________ Help-make mailing list [email protected] http://lists.gnu.org/mailman/listinfo/help-make
