Greg Chicares wrote on 29 July 2008 13:20:
> On 2008-07-29 08:31Z, PRC wrote:
>>
>> I have a variable in my makefile script, whose values may be
>> src_more = dir1/foo1.c dir2/foo2.c
>> I wonder how to expand the variable to
>> ----------------------------------------
>> vpath foo1.c dir1
>> vpath foo2.c dir2
>
> But what would happen if the variable's definition were as follows?
> src_more = dir1/fooA.c dir2/fooA.c
Well, just in case it doesn't: the trick PRC is looking for is to create a
multi-line macro using def/endef, expand that to a multi-line string using
foreach and call to do the substitution, then eval that string to execute it
as if it were makefile text.
src_more = dir1/foo1.c dir2/foo2.c
define vp
vpath $1 $2
endef
$(info $(foreach FILE,$(src_more),\
$(call vp,$(notdir $(FILE)),$(dir $(FILE)))))
$(eval $(foreach FILE,$(src_more),\
$(call vp,$(notdir $(FILE)),$(dir $(FILE)))))
all:
: ;
cheers,
DaveK
--
Can't think of a witty .sigline today....
_______________________________________________
Help-make mailing list
[email protected]
http://lists.gnu.org/mailman/listinfo/help-make
