Hello everyone,
I'm trying to write a generic makefile. The problem is that my source files
are not in the same directory.
For example :
Dir1/Dir2 : directory where is located the makefile and some source files
and where I run make.
Dir3/ : some other sources files.
So this pattern works for the source files in Dir1/Dir2 but obviously not
for those of Dir3/.
$(OBJDIR)/%.o:%.cpp
$(CPP) -o $@ -c $< $(CFLAGS) $(foreach
DIRECTORY,$(INCDIRS),-I$(DIRECTORY))
So I tried something like that with (INCDIRS=Dir1/Dir2 Dir3 Dir3/Dir4) but
it doesn't work L.
for DIRECTORY in $(INCDIRS) do \
$(OBJDIR)/%.o:$(DIRECTORY)/%.cpp
$(CPP) -o $@ -c $< $(CFLAGS) $(foreach
DIRECTORY,$(INCDIRS),-I$(DIRECTORY)) done
As the directories in INCDIRS change from a project to another I can't write
explicitly the rules. Is there a way to bypass this problem and generate
those targets ?
TIA.
Pierre-Julien VILLOUD
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