On Tue, 2008-12-02 at 11:12 +0530, kalyan wrote:
> I am trying to *conditionally* define/change  some makefile variables
> using eval. Is there a way to acheive this? 
> The condition here was trivial ( if [ 1 = 0 ] ), but in reality
> ofcourse it would be non-trivial.

Before you can do anything remotely complex with make you have to
completely understand the distinction between makefile code and shell
code.  Until you truly internalize this critical difference you will not
have success.

Make will fully evaluate every recipe.  Then it will invoke a shell and
pass the fully-evaluated recipe as a string of commands to it.  The
shell will operate on that string of commands and at the end it will
return an exit code.  If that code is 0, the recipe succeeded and make
continues with the next recipe.  If the code is non-0 the recipe failed
and make will stop (modulo various ways to avoid this).

That's it.  That's the only interaction there is.


Nothing the shell does can EVER change ANYTHING inside make.  You cannot
mix and match shell if-statements with makefile $(eval ...), for
example.  The entire string, including ALL variables and $(eval ...)
functions (and any other functions) will be fully expanded before the
shell gets anywhere near the set of commands, so putting an $(eval ...)
inside a shell if-statement is completely useless, from the standpoint
of only expanding the $(eval ...) conditionally.

If you want to do something in a makefile conditionally, you have to use
a makefile conditional, such as $(if ...), $(or ...), $(and ...), etc.

-- 
-------------------------------------------------------------------------------
 Paul D. Smith <[EMAIL PROTECTED]>          Find some GNU make tips at:
 http://www.gnu.org                      http://make.mad-scientist.us
 "Please remain calm...I may be mad, but I am a professional." --Mad Scientist


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