On Fri, Feb 27, 2009 at 10:50 AM, John Calcote <[email protected]> wrote:
> Kaylan,
...
> Also note the difference in dereference syntax. Make variables are
> dereferenced by make before the command is passed to the shell by using $()
> syntax, whereas shell variables are dereferenced by the shell after it
> receives the command, by using the ${} syntax.
Excellent description, John.
But, just for completeness, note that the ${} (curly braces) syntax is
also valid outside of shell commands (although I don't see too many
examples of it in the wild).
-Tom
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