Dear all:
I have some questions about make usage:
1. when passing command to shell why we have to add ";" at each end of command.
Is it the rule define in make or in shell?
example like below:
do_test:
libs='-L. ${SHLIBDEPS}'; for i in ${SHLIBDIRS}; do \
$(CLEARENV) && $(MAKE) -f Makefile.shared -e $(BUILDENV) \
link_a.$(SHLIB_TARGET); \
libs="-l$$i $$libs"; \
done
2. why sometimes we use "{}" to embrace variable instead of "()"
Is that due to we have to pass it to shell?
example like below:
ifeq (0,${MAKELEVEL})
whoami := $(shell whoami)
host-type := $(shell arch)
MAKE := ${MAKE} host-type=${host-type} whoami=${whoami}
endif
appreciate your help,
miloody
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