Mark,

See http://make.paulandlesley.org/autodep.html for a good way to handle auto
dependencies in make. Using the methods described in the article, you will
only build dependencies when they are needed.

-Pete

On 11/8/09, Mark Galeck (CW) <[email protected]> wrote:
>
> Hello,
>
> Suppose for each .c file such as foobar.c I have generated a makefile
> foobar.d file, that lists dependencies of foobar.o on files included in
> foobar.c.
>
> There are many .d files and each of them has many dependencies, so if I
> just blindly do
>
> -include $(OBJS:.o=.d)
>
> then it takes a lot of time for make to just get started.  What I want, is
> to only include all of those *.d when needed, that is, when some include
> file has been modified.  I want this whenever a user calls
>
> >make target
>
> for any target.  How to do this?
> --------------------------
>
> What follows below is my solution to this problem, but it only works for
> >make
> (default target)
> and can be extended to any fixed number of other targets, but not to
> general target such as
> >make foobar.o
> where foobar.c is any .c file
>
>
> The solution,
> simplified somewhat to show you just the gist of it,
> is to generate another makefile called "included" like this:
>
> chooseIncl:
>         ($(MAKE) -q lastIncl && ( $(MAKE) noIncl & touch lastIncl)) ||
> ($(MAKE) incl & touch lastIncl)
>
> lastIncl:\
> foobar.h\
> foobar1.h\
> (...)
>
>
> (lastIncl depends on all the included files).
> If you don't know DOS, the way the rule for chooseIncl works, is that if
> any included files have changed, then
> $(MAKE) incl
> is called, otherwise
> $(MAKE) noIncl
> is called
>
>
> then include "included" at the top of the main makefile,
> and put in the main makefile (where "all" is the original default target):
>
> incl noIncl: all
>
> ifeq (incl, $(MAKECMDGOALS))
> -include $(ALL_OBJS:.o=.d)
> endif
>
>
>
>
>
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>
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