>From info make
The only processing `make' does on the result
is to convert each newline (or carriage-return / newline pair) to a
single space. If there is a trailing (carriage-return and) newline it
will simply be removed.
So it looks like, that you can not change this behaviour. Workaround
depends on what your script actually does. For example suggested below
you can do something like this
vars_to_define=foo bam
foo_script=echo 123
bam_script=echo hi
$(foreach v,$(vars_to_define),$(eval $(v)=$(shell $($(v)_script))))
.PHONEY: bar
bar:
@echo foo: $(foo)
@echo
@echo bam: $(bam)
[email protected] wrote:
> On Sat 6/16/12 12:39 EDT ogronom wrote:
>> I'm not sure, but maybe you don't need include and temp files. Try
>> something like this.
>>
>> $(eval $(shell build-ddef.sh))
>
> Nice idea, but I need help to get it to work, take a look:
>
> /tmp $ cat makefile
>
> $(eval $(shell echo -e 'bam=hi\nfoo=123'))
>
> .PHONEY: bar
> bar:
> @echo foo: $(foo)
> @echo
> @echo bam: $(bam)
> /tmp $ make bar
> foo:
>
> bam: hi foo=123
>
> What should the eval code be changed to so that foo has the proper value
> of '123'? I need to support shell output defining about 7 macros,
> each of which needs to be parsed by make as a separate line (right?).
>
> I've looked the texinfo help on 'eval'; my hunch is this is possible,
> with proper metaquoting, and possibly the use of define, call, or another
> approach I'm unaware of. Any help or examples appreciated.
>
> --
> thanks
>
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