Hello:
I have three makefiles:
Makefile:
-----------
include Makefile.par
all:
@echo $(CC)
make -f Makefile.sub
---------------------
Makefile.par:
----------------
CC=gcc
ifeq ($(CC),xlc)
override CC=xlc_r
endif
export CC
---------------------
Makefile.sub:
-----------------
all:
@echo $(CC)
---------------------------
As you can see, Makefile.par changes the CC variable using override if
in the command line is passed the value 'xlc' and then exports it. The
actual compilation is done by Makefile.sub. My problem is that when
the CC variable is changed and exported in Makefile.par, the modified
result is viewed in Makefile, but not in Makefile.sub, that uses de CC
value passed in the command line. How can I use override and export in
order to use the modified CC variable in Makefile.sub
Thanks
--
*****************************************
José Luis García Pallero
[email protected]
(o<
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V_/_
Use Debian GNU/Linux and enjoy!
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