Hi! I hope someone might help me to understand a 3-line makefile fragment. It is a condensed example of something that is baffling me.
[david] $ make --version GNU Make 3.81 on Debian 7 i386. Here is the makefile: [david] $ cat Makefile $(warning $(shell echo * ; echo , ; touch FLAG ; echo *)) $(warning $(wildcard *)) $(warning $(shell echo * ; echo , ; rm FLAG ; echo *)) Here is the output when run in an empty directory: [david] $ make Makefile:1: Makefile , FLAG Makefile Makefile:2: Makefile Makefile:3: FLAG Makefile , Makefile make: *** No targets. Stop. Line 1 shows that the FLAG file is created. Line 3 shows that the FLAG file was removed without error. So, if line 2 executes between them, I expect to see the FLAG file in the $(wildcard *) expansion of line 2. Why is it not there? I have read about how make parses makefiles, in the Mecklenburg book and at http://www.gnu.org/software/make/manual/make.html#Reading-Makefiles. Based on this I expect that this makefile would be entirely immediately expanded during phase 1, and that the 3 statements would be expanded in order. But the output seems to prove that evaluation of line 2 does not occur between lines 1 and 3. Can anyone explain what is happening here? _______________________________________________ Help-make mailing list [email protected] https://lists.gnu.org/mailman/listinfo/help-make
