I've just started trying to use target-specific variables and I'm getting
results I don't understand. I'm
using make 3.81.
With this Makefile:
============================
a: SRCS = a1.c a2.c
OBJS = $(SRCS:.c=.o)
a: $(OBJS)
@echo $(OBJS)
@echo Making $@ from $^
@touch $@
============================
I get the output:
============================
a1.o a2.o
Making a from
============================
So, OBJS is defined correctly in the rule, but not as a dependency. What is
that?
Michael
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