Use \$.

On Apr 18, 2017 10:14 AM, "Richard Cavell" <[email protected]> wrote:

>    Hello all.  For debugging purposes, I am trying to put this into my
>    makefile:
>
>    .PHONY: dumpvars
>
>    dumpvars: source.c source.h
>    @echo "$(RM) is " $(RM)
>    @echo "$? expands to : " $?
>
>    and so on.  But obviously, Make is expanding all instances of the
>    variables' names.  How do I prevent this?
>
>    TIA,
>    Richard
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