(GNU Make 4.4.1 - Built for x86_64-redhat-linux-gnu)
Consider the following trivial contrived makefile:
.PHONY: clean
count_words: lexer.o
gcc lexer.o -o count_words -lfl
lexer.o: lexer.c
gcc -c lexer.c
lexer.c: lexer.l
flex -t lexer.l > lexer.c
clean:
rm -f *.o lexer.c count_words
There is no lexer.l file in the current directory.
Running make results in the following error message:
make: *** No rule to make target 'lexer.l', needed by 'lexer.c'. Stop.
Shouldn't this be
make: *** No rule to make prerequisite 'lexer.l', needed by 'lexer.c'.
Stop.
After all, lexer.l appears as a prerequisite in the rule for lexer.c.
lexer.l doesn't appear as a target anywhere.
This is a very trivial matter.
Cordially,
Jon Forrest
