CALL FOR PAPERS - ICCD 2010
IEEE INTERNATIONAL CONFERENCE ON COMPUTER DESIGN
Oct 3-6, 2010 - AMSTERDAM, The NETHERLANDS
http://iccd.et.tudelft.nl/2010
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IMPORTANT DATES:
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**Extended (Firm) Deadlines**
Submission of abstract: May 14
Submission of full paper: May 21
Notification deadline: July 23
Final manuscript: August 23
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THEME:
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The theme for the 2010 ICCD conference is Embedded Systems.
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TOPICS OF INTEREST
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Submitted papers consistent with the theme are encouraged.
Authors are invited to submit technical papers in accordance to the
author's instructions
describing original work in one of the following areas:
Computer Systems: Methods, Implementations and Applications
* Advanced Computer Architecture for General and Application-Specific
Enhancement
* Modeling and Performance Analysis
* Support for Operating Systems and Languages
* Memory Hierarchy
* System Design Methods for Uni-and Parallel-Processors
Processor Architecture
* Micro Architecture Design Techniques
* Pipelining, Caching, Branch Prediction, and Multithreading,
Computer Arithmetic
* Techniques for Low-power; Secure, and Reliable Processor Designs
* Embedded Network, System-on-chip, and Application Specific
Processor Design
* Real-life Design Challenges: Case Studies, Tradeoffs and Post-mortems
Logic and Circuit Design
* Circuits and Design Techniques for Digital, Memory, and
Mixed-signal Systems
* Circuits and Design Techniques for High Performance and Low Power
* Circuits and Design Techniques for Robustness Under Process
Variability and Radiation
* Design Techniques for Emerging Process Technologies
* Asynchronous Circuits
* Signal Processing and Arithmetic Circuits
Electronic Design Automation
* High-level, Logic and Physical Synthesis
* Physical Planning, Design and Early Estimation for Large Circuits
* Automatic Analysis and Optimization of Timing, Power and Noise
* Tools for Multiple-clock Domains, Asynchronous and Mixed-timing
Methodologies
* CAD Support for FPGAs, ASSPs, Structured ASICs, Platform-based
Design and NoC HDL
* Tools, Methodologies and Design Strategies for Emerging Technologies
(MEMs,Spintronics,Nano,Quantum)
Verification and Test
* Simulation Based and Formal Techniques for Functional Design
Verification
* Equivalency Checking, Property Checking, Theorem Proving
* High-level Design Validation
* Design Error Debug and Diagnosis
* Hardware/Software Validation
* Fault Modeling
* Fault Simulation and ATPG
* DFT and BIST
* SoC Testing
Technical Program Committee
Armin Biere (Johannes Kepler University, Austria)
Roderick Bloem (Graz University of Technology, Austria)
John Carulli (Texas Instruments, USA)
Alessandro Cimatti (FBK-IRST, Italy)
Jennifer Dworak (Brown University, USA)
Masahiro Fujita (University of Tokyo, Japan)
Said Hamdioui (Delft University of Technology, The Netherlands)
Sybille Hellebrand (University of Paderborn, Germany)
Michael Hsiao (Virigina Tech, USA)
Christian Jacobi (IBM, Germany)
Daniel Kroening (Oxford University, UK)
Thomas Kropf (Bosch GmbH, Germany)
Linda Milor (Georgia Institute of Technology, USA)
Amit Nahar (Texas Instruments, USA)
Nicola Nicolici (McMaster University, Canada)
Alex Orailoglu (UC San Diego, USA)
Sule Ozev (Arizona State University, USA)
Jun Sawada (IBM Austin, USA)
Klaus Schneider (University of Kaiserslautern, Germany)
Sandeep Shukla (Virginia Tech, USA)
Anna Slobodova (Centaur Technology, USA)
Dominik Stoffel (University of Kaiserslautern, Germany)
Hans-Joachim Wunderlich (University of Stuttgart, Germany)
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