Design Verification of complex billion gate SoCs is one of the most challenging
problems in the semi-conductor industry. Coping with verification complexity
and meeting time-to-market requirements and at the same time achieving
appropriate quality milestones is the most enjoyable experience any engineer
can have.The Advanced Verification Methodology (AVM) group in Imagination since
its inception in 2013 has been leading the foundational methodology work in
formal verification and its application to numerous projects internally. Having
trained a number of engineers internally in Imagination in the use of formal
verification and with numerous patents filed and several papers published in
top conferences - this group combines the very best of grounds up innovation
and execution on projects under tight deadlines. If you're excited about
verification and validation and if bug hunting and building formal proofs is
something that you enjoy, then please contact me at [email protected].
Ashish Darbari, DPhil (Oxon), FBCS, FIETE, SMACM, SMIEEERoyal Academy of
Engineering Visiting ProfessorVisiting Professor University of
SouthamptonPrincipal Hardware Design Engineer, Imagination Technologies Kings
Langley WD4 8LZ
[email protected]
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