Hi Brice,
I have one question regarding thread id:
=======================================
./hwloc-calc --physical --list core proc:60
11
is matching with
core id : 11 from /proc/cpuinfo
./hwloc-calc --physical --list socket proc:60
0
is matching with
physical id : 0 from /proc/cpuinfo
and obviously --physical proc:60 corresponds to
processor : 60 from /proc/cpuinfo
On Itanium there is also
thread id : 0
line in /proc/cpuinfo
===================================================
In our current code (based solely on /proc/cpuinfo, we are moving it to use
hwloc instead) we are using "thread id". Currently, on boxes with hyper
threading enabled I parse lstopo output and map "physical thread id" following
way:
NUMANode #2 (phys=3 2048MB) + Socket #3 + L3 #3 (24MB)
L2 #24 (256KB) + L1 #24 (32KB) + Core #24
PU #48 (phys=3) => thread id 0
PU #49 (phys=35) => thread id 1
L2 #25 (256KB) + L1 #25 (32KB) + Core #25
PU #50 (phys=7) => thread id 0
PU #51 (phys=39) => thread id 1
(You can think of it as doing logical_CPU modulo <number of HW threads on
given Core>)
I know that such mapping is artificial. However, it enables me to see that
hyper threading is enabled. I use it in my reports only.
I wonder if some similar concept exists in hwloc. To be honest, I don't know
what the future of "thread id" in /proc/cpuinfo file is. It seems to be only in
/proc/cpuinfo for ia64.
Thanks for your opinion!
Jirka
PS: I have included /proc/cpuinfo from IA64 box.
processor : 0
vendor : GenuineIntel
arch : IA-64
family : Itanium 2
model : 1
revision : 1
archrev : 0
features : branchlong, 16-byte atomic ops
cpu number : 0
cpu regs : 4
cpu MHz : 1415.000276
itc MHz : 399.167638
BogoMIPS : 2834.43
siblings : 2
physical id: 0
core id : 0
thread id : 0
processor : 1
vendor : GenuineIntel
arch : IA-64
family : Itanium 2
model : 1
revision : 1
archrev : 0
features : branchlong, 16-byte atomic ops
cpu number : 0
cpu regs : 4
cpu MHz : 1415.000276
itc MHz : 399.167638
BogoMIPS : 2826.24
siblings : 2
physical id: 0
core id : 1
thread id : 0
