On Aug 15, 2011, at 4:14 PM, Samuel Thibault wrote:
> Wheeler, Kyle Bruce, le Tue 16 Aug 2011 00:11:41 +0200, a écrit :
>> I'm having the problem that my Magny Cours system is being identified (via
>> hwloc-ls) as sharing an L3 cache between the NUMAnodes on a single socket. I
>> know that this is not actually true, and I don't know how to begin debugging
>> hwloc to see why it thinks that about the L3 cache. Thoughts?
>
> I guess you have updated to the latest Linux kernel version?
Unfortunately, this is not on a machine I have root access to. But, for what
it's worth, here's the uname -a output:
Linux mzlogin01e 2.6.27.45-0.1-default #1 SMP 2010-02-22 16:49:47 +0100 x86_64
x86_64 x86_64 GNU/Linux
> If the problem persists, please attach the output of lstopo after having
> given the --enable-debug option to ./configure and rebuilt completely,
> to get debugging output. Also attach the /proc + /sys tarball generated
> by the installed script hwloc-gather-topology.sh
I'm attaching the lstopo output, but hwloc-gather-topology doesn't seem to work
on my compute nodes... not sure why. It doesn't report any failures, but it
doesn't create the tarball either (just spits out more lstopo output).
--
Kyle B. Wheeler
Dept. 1423: Scalable System Software
Sandia National Laboratories
505-844-0394
Machine (P#0 total=33554048KB Backend=Linux LinuxCgroup=/3633451)
Socket L#0 (P#0 total=16776832KB)
L3Cache L#0 (total=16776832KB 10240KB line=64)
NUMANode L#0 (P#0 local=8388224KB total=8388224KB)
L2Cache L#0 (512KB line=64)
L1Cache L#0 (64KB line=64)
Core L#0 (P#0)
PU L#0 (P#0)
L2Cache L#1 (512KB line=64)
L1Cache L#1 (64KB line=64)
Core L#1 (P#1)
PU L#1 (P#1)
L2Cache L#2 (512KB line=64)
L1Cache L#2 (64KB line=64)
Core L#2 (P#2)
PU L#2 (P#2)
L2Cache L#3 (512KB line=64)
L1Cache L#3 (64KB line=64)
Core L#3 (P#3)
PU L#3 (P#3)
NUMANode L#1 (P#1 local=8388608KB total=8388608KB)
L2Cache L#4 (512KB line=64)
L1Cache L#4 (64KB line=64)
Core L#4 (P#0)
PU L#4 (P#4)
L2Cache L#5 (512KB line=64)
L1Cache L#5 (64KB line=64)
Core L#5 (P#1)
PU L#5 (P#5)
L2Cache L#6 (512KB line=64)
L1Cache L#6 (64KB line=64)
Core L#6 (P#2)
PU L#6 (P#6)
L2Cache L#7 (512KB line=64)
L1Cache L#7 (64KB line=64)
Core L#7 (P#3)
PU L#7 (P#7)
Socket L#1 (P#1 total=16777216KB)
L3Cache L#1 (total=16777216KB 10240KB line=64)
NUMANode L#2 (P#2 local=8388608KB total=8388608KB)
L2Cache L#8 (512KB line=64)
L1Cache L#8 (64KB line=64)
Core L#8 (P#0)
PU L#8 (P#8)
L2Cache L#9 (512KB line=64)
L1Cache L#9 (64KB line=64)
Core L#9 (P#1)
PU L#9 (P#9)
L2Cache L#10 (512KB line=64)
L1Cache L#10 (64KB line=64)
Core L#10 (P#2)
PU L#10 (P#10)
L2Cache L#11 (512KB line=64)
L1Cache L#11 (64KB line=64)
Core L#11 (P#3)
PU L#11 (P#11)
NUMANode L#3 (P#3 local=8388608KB total=8388608KB)
L2Cache L#12 (512KB line=64)
L1Cache L#12 (64KB line=64)
Core L#12 (P#0)
PU L#12 (P#12)
L2Cache L#13 (512KB line=64)
L1Cache L#13 (64KB line=64)
Core L#13 (P#1)
PU L#13 (P#13)
L2Cache L#14 (512KB line=64)
L1Cache L#14 (64KB line=64)
Core L#14 (P#2)
PU L#14 (P#14)
L2Cache L#15 (512KB line=64)
L1Cache L#15 (64KB line=64)
Core L#15 (P#3)
PU L#15 (P#15)
depth 0: 1 Machine (type #1)
depth 1: 2 Sockets (type #3)
depth 2: 2 Caches (type #4)
depth 3: 4 NUMANodes (type #2)
depth 4: 16 Caches (type #4)
depth 5: 16 Caches (type #4)
depth 6: 16 Cores (type #5)
depth 7: 16 PUs (type #6)
depth 3 distance matrix:
index 0 1 2 3
0 1.000 1.600 1.600 1.600
1 1.600 1.000 1.600 1.600
2 1.600 1.600 1.000 1.600
3 1.600 1.600 1.600 1.000
Topology not from this system
