Hey Jean,

Jean Delvare wrote:
> Hi Ivo,
>
>   
> I am very interested in this as well. I have several ICH3-M, ICH5 and
> ICH7-based systems here for testing as soon as you have something good
> enough to be published.
>
> For devices which support the block buffer (i.e. ICH4 and later),
> Oleg's patch improved speed dramatically for block transactions
> already. I don't think that you will win much with interrupts here,
> except maybe for HZ=100. I think that you will win a lot more on short
> transactions, where polled mode has to wait for at least one jiffie
> (and more like 2 on practice) and interrupt mode could be one or two
> orders of magnitude faster than this. For hardware monitoring chips
> with a lot of registers (e.g. LM85 or ADM1026) the speedup should be
> very visible.
>
>   
Sadly I haven't been able to test this improvement due to lack of
(available) hardware. The last test showed a bug which crashes the
controller but I think I've already fixed it. Luckily, Hans de Goede
arranged a spare PC which I can use for testing and development. I hope
to pick it up soon and development should speed up then!

So, thanks to the HHS (Hague University) for making a system available
for testing and thanks to Hans for arranging this!

> What value of HZ are you using? It matters for polled mode. From the
> figures above I'd guess HZ=1000. Try again with HZ=250 or even HZ=100
> if you want more impressive figures ;)
>   
Default, so 1000 I suppose.
>> New driver:
>> (time 25x i2cdump -s)
>> ./bla (i2c-dump 25x)
>> real    0m24.215s
>> user    0m0.013s
>> sys     0m0.175s
>> --
>> I2C_SMBUS_QUICK(nodev) 0.00112
>> I2C_SMBUS_QUICK 0.00112
>> I2C_SMBUS_BYTE 0.00110
>> I2C_SMBUS_BYTE_DATA 0.00113
>> I2C_SMBUS_WORD_DATA 0.00108
>>     
>
> So that would be a 2x improvement for short transactions at HZ=1000...
> and 20x at HZ=100. Very nice :)
>   
Seems quite nice yes, let's just hope I/we can get it stable enough!

Ivo


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