hi David, > But I recall the lack of flow control to be a bigger issue. > The hardware liked to TX the next byte before it was loaded > into the (single byte) TX fifo, and then complain that there > was no byte there. And likewise, to RX the next byte before > the previous one got removed. Or ... if that's not what it > was doing, it sure acted like it was! Now, *THOSE* issues > seem highly amenable to hardware-only fixes: just stretch > the clock until the FIFO is ready.
According to the datasheet, the G20 supports both clock stretching and repeated starts. The TWI is now also connected to a PDC, so we can set-up a DMA buffer for the TWI receives and transmits. Regards, Andrew Victor _______________________________________________ i2c mailing list [email protected] http://lists.lm-sensors.org/mailman/listinfo/i2c
