Bill Fairchild wrote: >Both.
>The hardware part of it is described in the Principles of Operation. A >control register bit, if on, enables LAP. >The software part of it is that at NIP the operating system (z/OS) turns the bit on. >When LAP is enabled, any attempt by the running program to store into virtual addresses 0-511 of page 0 on a CPU is prevented. Thanks. I appreciate your excellent explanation! I know about low virtual addresses are protected in a special way. All of the very best for you! And please keep up with your excellent postings! Groete / Greetings Elardus Engelbrecht ---------------------------------------------------------------------- For IBM-MAIN subscribe / signoff / archive access instructions, send email to [email protected] with the message: GET IBM-MAIN INFO Search the archives at http://bama.ua.edu/archives/ibm-main.html
