[EMAIL PROTECTED] (Dean Kent) writes:
> Hopefully not far off topic, but this recently published article
> indicates that IBM may merge i, p and z series processors using
> POWER6.  At one time I recall seeing an official IBM statement
> saying that this would never happen because of the unique
> requirements for (at that time) S/390 Architecture.  Any thoughts on
> whether this is pure speculation, or if it is a real possibilty due
> to economics, advances in technology or perhaps a desire to make
> zSeries less costly and broaden the market?  Could this result in
> affordable desktop mainframes (so we don't need to worry about
> whether IBM will ever allow zOS to run on Hercules)?  ;-)
>
> http://www.realworldtech.com/page.cfm?ArticleID=RWT121905001634

can you say fort knox?

1980 there was effort afoot to convert much of the internal
microprocessors, controllers to 801. the follow-on to the 4341 was going
to be an 801. the issue at the time was that there was a huge number of
different microprocessors all with different architectures and
programming. the convergence to 801 was to eliminate a lot of the
different variety. the issue for the low and mid-range 370 at the time
was that they they implemented 370 in microcode with something like an
avg. of 10:1 microcode instructions per 370 instruction (not all that
different from the current generation of software implementing mainframe
architecture on intel platforms).

this was something of the ecps boost for vm on the 148 & 4341 ... moving
high use kernel paths into microcode ... with a resulting 10:1
performance boost (and much greater for some involving instruction
simulation and not having to save/restore registers as part of context
switch between user mode and kernel mode) ... a couple more detailed
discussion of ecps:
http://www.garlic.com/~lynn/94.html#21 370 ECPS VM microcode assist
http://www.garlic.com/~lynn/94.html#27 370 ECPS VM microcode assist
http://www.garlic.com/~lynn/94.html#28 370 ECPS VM microcode assist

at least for the 4341, the project was aborted. the issue being that
chip silicon was progressing to the point where it was possible to
directly implement 370 architecture in hardware (as opposed to having
much simpler hardware architecture that in turn was progremmed to
implement more complex 370 architecture). as a result the 4341 following
became a a direct 370 silicon implementation rather than 801 chip with
microprogramming implementing 370.

note that 370 instructions running close to hardware speed was already
coming close to happening with high-end machines like 3033.

another aspect of this presented itself with amdahl's initial hypervisor
implementation. one of the issues for the high-end machines were that
they tended to be horizontal microcode which was significantly harder
program than veritical microcode and/or 370. even tho 370 instructions
were coming close to running at hardware speed, the high-end machines
were still (horizontal) microcode and had reputation for being extremely
hard to program.

i gave a presentation at baybunch about the ecps experience ... that
while there was a 10:1 performance gain moving kernel code directly into
microcode (on 148 & 4341) ... there was even large performance pickup by
not having to context switch into the vm kernel (save/restoring
registers, etc).

amdahl had previously created "macro" code for their high-end machines
.... basically part of the hardware context ... but using a subset of
370 programming (rather than the much more difficult to program
horizontal microcode). several people then implemented a subset of
virtual machine function as hypervisor support ... with the
implementation being done using "macrocode".

ibm eventually responded with pr/sm (on 3090) and then expanded it to
multiple with LPARs (logical partitions). however, this was a much more
difficult undertaking ... requiring implementation done directly in the
3090 microcode.

and as previously noted in some recent posts in other threads in this
n.g. ... virtualization is the new, new thing this season.
http://www.garlic.com/~lynn/2005u.html#36 Mainframe Applications and
Records Keeping?
http://www.garlic.com/~lynn/2005u.html#37 Mainframe Applications and
Records Keeping?

an 801 from that period that did survive was romp ... which was
research, office products effort to build a displaywriter follow-on.
when that was killed, it was decided to retarget the machine to the unix
workstation market ... and that company that had done the port for the
ibm/pc pc/ix was hired to do a similar port for romp, which was called
aix. the followon to romp was rios, or power.

misc. past 801, romp, rios, power, etc postings
http://www.garlic.com/~lynn/subtopic.html#801

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