Shmuel Metz , Seymour J. wrote: > ES came in with the 3081, where it was physically distinct. As I > recall the ES on the 3090 was from the same pol but configured as ES > in the LPAR definition.
expanded store was introduced in 3090 ... the memory was the same as regular storage ... the problem was physical packaging with the amount of memory. the amount of memory they could packaged couldn't be put all on the same bus within the instruction execution latency requirements ... so they went to a two level design ... that was software managed (as opposed to sci and numa designs that are hardware implementations). the expanded store bus had longer latency and wider. it was something akin to electronic paging drum ... but using synchronous instructions instead of asynchronous i/o. later machines didn't have the physical memory packaging problem ... but the construct lingered for other reasons. note also, when kingston went to attach hippi to 3090 ... they cut into the side of the expanded store bus ... since it was the only available interface that could support 800mbit/sec hippi i/o. however, expanded store bus didn't directly have any channel program processor ... so they went to a peek/poke architecture for controlling hippi i/o operations. later machines didn't have the physical memory packaging problem ... but the construct stayed around for other reasons. recent thread discussing expanded storage construct lingering on. http://www.garlic.com/~lynn/2006b.html#14 Expanded Storage http://www.garlic.com/~lynn/2006b.html#15 {SPAM?} Re: Expanded Storage http://www.garlic.com/~lynn/2006b.html#16 {SPAM?} Re: Expanded Storage http://www.garlic.com/~lynn/2006b.html#17 {SPAM?} Re: Expanded Storage http://www.garlic.com/~lynn/2006b.html#18 {SPAM?} Re: Expanded Storage circa 1980, several hundred electronic paging drums were acquired from another vendor for internal datacenter use that emulated 2305 ... they were called 1655. misc. past posts mentioning 1655 http://www.garlic.com/~lynn/2001c.html#17 database (or b-tree) page sizes http://www.garlic.com/~lynn/2001l.html#53 mainframe question http://www.garlic.com/~lynn/2002.html#31 index searching http://www.garlic.com/~lynn/2002i.html#17 AS/400 and MVS - clarification please http://www.garlic.com/~lynn/2002l.html#40 Do any architectures use instruction count instead of timer http://www.garlic.com/~lynn/2003b.html#15 Disk drives as commodities. Was Re: Yamhill http://www.garlic.com/~lynn/2003b.html#17 Disk drives as commodities. Was Re: Yamhill http://www.garlic.com/~lynn/2003c.html#55 HASP assembly: What the heck is an MVT ABEND 422? http://www.garlic.com/~lynn/2003m.html#39 S/360 undocumented instructions? http://www.garlic.com/~lynn/2004d.html#73 DASD Architecture of the future http://www.garlic.com/~lynn/2004e.html#3 Expanded Storage http://www.garlic.com/~lynn/2005e.html#5 He Who Thought He Knew Something About DASD http://www.garlic.com/~lynn/2005r.html#51 winscape? http://www.garlic.com/~lynn/2006.html#38 Is VIO mandatory? past posts mentioning sci, numa (non-uniform memory architecture), hippi, etc http://www.garlic.com/~lynn/96.html#25 SGI O2 and Origin system announcements http://www.garlic.com/~lynn/98.html#40 Comparison Cluster vs SMP? http://www.garlic.com/~lynn/2000e.html#8 Is a VAX a mainframe? http://www.garlic.com/~lynn/2001.html#12 Small IBM shops http://www.garlic.com/~lynn/2001.html#46 Small IBM shops http://www.garlic.com/~lynn/2001b.html#39 John Mashey's greatest hits http://www.garlic.com/~lynn/2001b.html#85 what makes a cpu fast http://www.garlic.com/~lynn/2001d.html#54 VM & VSE news http://www.garlic.com/~lynn/2001d.html#55 VM & VSE news http://www.garlic.com/~lynn/2001f.html#11 Climate, US, Japan & supers query http://www.garlic.com/~lynn/2001j.html#12 OT - Internet Explorer V6.0 http://www.garlic.com/~lynn/2001j.html#17 I hate Compaq http://www.garlic.com/~lynn/2001l.html#16 Disappointed http://www.garlic.com/~lynn/2002g.html#10 "Soul of a New Machine" Computer? http://www.garlic.com/~lynn/2002h.html#78 Q: Is there any interest for vintage Byte Magazines from 1983 http://www.garlic.com/~lynn/2002i.html#83 HONE http://www.garlic.com/~lynn/2002j.html#45 M$ SMP and old time IBM's LCMP http://www.garlic.com/~lynn/2002l.html#52 Itanium2 performance data from SGI http://www.garlic.com/~lynn/2002p.html#8 Sci Fi again http://www.garlic.com/~lynn/2002p.html#30 Sci Fi again http://www.garlic.com/~lynn/2002q.html#6 Sci Fi again was: THIS WEEKEND: VINTAGE http://www.garlic.com/~lynn/2002q.html#8 Sci Fi again was: THIS WEEKEND: VINTAGE http://www.garlic.com/~lynn/2003.html#0 Clustering ( was Re: Interconnect speeds ) http://www.garlic.com/~lynn/2003.html#6 vax6k.openecs.org rebirth http://www.garlic.com/~lynn/2003.html#39 Flex Question http://www.garlic.com/~lynn/2003d.html#57 Another light on the map going out http://www.garlic.com/~lynn/2003j.html#65 Cost of Message Passing ? http://www.garlic.com/~lynn/2003p.html#3 Hyperthreading vs. SMP http://www.garlic.com/~lynn/2003p.html#16 Star Trek, time travel, and such http://www.garlic.com/~lynn/2003p.html#30 Not A Survey Question http://www.garlic.com/~lynn/2004.html#0 comp.arch classic: the 10-bit byte http://www.garlic.com/~lynn/2004.html#1 Saturation Design Point http://www.garlic.com/~lynn/2004c.html#37 Memory Affinity http://www.garlic.com/~lynn/2004d.html#6 Memory Affinity http://www.garlic.com/~lynn/2004d.html#68 bits, bytes, half-duplex, dual-simplex, etc http://www.garlic.com/~lynn/2005.html#40 clusters vs shared-memory (was: Re: CAS and LL/SC (was Re: High Level Assembler for MVS & VM & VSE)) http://www.garlic.com/~lynn/2005.html#48 [OT?] FBI Virtual Case File is even possible? http://www.garlic.com/~lynn/2005.html#50 something like a CTC on a PC http://www.garlic.com/~lynn/2005d.html#20 shared memory programming on distributed memory model? http://www.garlic.com/~lynn/2005e.html#12 Device and channel http://www.garlic.com/~lynn/2005e.html#19 Device and channel http://www.garlic.com/~lynn/2005f.html#18 Is Supercomputing Possible? http://www.garlic.com/~lynn/2005h.html#13 Today's mainframe--anything to new? http://www.garlic.com/~lynn/2005j.html#13 Performance and Capacity Planning http://www.garlic.com/~lynn/2005j.html#16 Performance and Capacity Planning http://www.garlic.com/~lynn/2005j.html#17 Performance and Capacity Planning http://www.garlic.com/~lynn/2005j.html#26 IBM Plugs Big Iron to the College Crowd http://www.garlic.com/~lynn/2005k.html#28 IBM/Watson autobiography--thoughts on? http://www.garlic.com/~lynn/2005m.html#46 IBM's mini computers--lack thereof http://www.garlic.com/~lynn/2005m.html#55 54 Processors? http://www.garlic.com/~lynn/2005n.html#4 54 Processors? http://www.garlic.com/~lynn/2005n.html#6 Cache coherency protocols: Write-update versus write-invalidate http://www.garlic.com/~lynn/2005n.html#37 What was new&important in computer architecture 10 years ago ? http://www.garlic.com/~lynn/2005n.html#38 What was new&important in computer architecture 10 years ago ? http://www.garlic.com/~lynn/2005r.html#43 Numa-Q Information http://www.garlic.com/~lynn/2005r.html#46 Numa-Q Information http://www.garlic.com/~lynn/2005s.html#38 MVCIN instruction http://www.garlic.com/~lynn/2005s.html#40 Filemode 7-9? http://www.garlic.com/~lynn/2005v.html#0 DMV systems? http://www.garlic.com/~lynn/2006.html#16 Would multi-core replace SMPs? http://www.garlic.com/~lynn/2006.html#32 UMA vs SMP? Clarification of terminology http://www.garlic.com/~lynn/2006b.html#14 Expanded Storage http://www.garlic.com/~lynn/96.html#8 Why Do Mainframes Exist ??? ---------------------------------------------------------------------- For IBM-MAIN subscribe / signoff / archive access instructions, send email to [EMAIL PROTECTED] with the message: GET IBM-MAIN INFO Search the archives at http://bama.ua.edu/archives/ibm-main.html
