>Back in the old pre-CMOS days, external interrupts like I/O were handled 
by one or more of the same CPs that calculated dividend interest or life 
expectancy or rocket velocity. 

This actually came out on the 308x.
It had nothing to do with CMOS.


>We had some control over how many CPs were 
drafted into interrupt handling, such as parameters in IEAOPTxx that could 
include or exclude CPs according to how busy they got.

This still happens.
The SAP does a lot of work, but the CP still has to process a lot of the I/O.



>With the introduction of CMOS (967x), the CEC as delivered provided 
physically distinct Service Assist Processors that relieved the mainline 
CPs from having to perform these tasks.

The GP CP still has to do some work.

They were called IOP's, with two different meanings.
The big difference is that prior to 9672's, you only had one.
(Actually, ISTR they were called EXDC's on the 308x -- EXternal Data 
Controllers, the IOP's on the 3090, and IOP's with a different meaning on the 
9000, which is different than I posted earlieray.

>The tuning recommendation changed 
at that time to allow the system full control over use of the SAPs by 
coding CPENABLE=(0,0) . 

Wrong!
This determines how many CP's will handle the remainder of the work.

There is a Washington Tech Centre Bulletin that contains the current 
recommendations for CPENABLE.

I haven't looked lately, but the last time I did, they were back to 
CPENABLE=(10,30) for z/990.

-
-teD

I’m an enthusiastic proselytiser of the universal panacea I believe in!

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