Charles Mills wrote:

> Do I recall correctly hearing that BCTR Rn,0 is no longer the favored way
of
> decrementing a register, perhaps because the cache logic sees it as a
> potential branch, and that AHI Rn,-1 should be substituted?

Seems unlikely to me. I'd think even the worst branch prediction algorithm
is going to predict a BCTR Rn,0 as "not taken" (what're you going to do -
EXecute it and change the second register to non-zero?) AHI is a larger
instruction, and it has potential program checks, which BCTR hasn't. I'd
guess that makes it harder to set up for execution.

> Similarly, that AHI is preferable to LA for adding a small increment to a
> register, perhaps because LA may invoke or "reserve" the address
translation
> logic?

Again, seems unlikely. LA can't program check, and although it sounds like
an addressing instruction, doesn't deal with things like access registers or
translation.

But I'm not a z hardware or millicode designer.

Tony H.

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