In <[EMAIL PROTECTED]>, on 10/26/2006
at 10:54 AM, Phil Payne <[EMAIL PROTECTED]> said:
>Hard to envisage the economics of an assist for an instruction whose
>worst case is a machine cycle and whose best case is pre-cycle
>recognition.
Yes, when you change the issue that way it becomes hard to envisage.
>Their superfluousness is recognised in the pipe.
That's the assist whose necessity you don't understand.
>It's quite phenomenal
To you, perhaps. To those who have been looking at a lot of different
hardware designs, it's routine.
>how many instructions are never "executed" in that sense,
Techniques for that have been in the open literature for decades.
--
Shmuel (Seymour J.) Metz, SysProg and JOAT
ISO position; see <http://patriot.net/~shmuel/resume/brief.html>
We don't care. We don't have to care, we're Congress.
(S877: The Shut up and Eat Your spam act of 2003)
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