The following message is a courtesy copy of an article
that has been posted to bit.listserv.ibm-main,alt.folklore.computers as well.

[EMAIL PROTECTED] (Phil Smith III) writes:
> Re RISC vs. 68K:
> Anyone who thinks the RISC chips killed the 68K is off base.  They
> just need to check the dates.  Intel killed the 68K.  Motorola allied
> with IBM on RISC only after Intel had destroyed Motorola's market for
> the 68K.

801 was originally targeted (very) low-end ... ROMP chip was targeted to
be used in a displaywriter follow-in ... when that project was killed,
the group looked around for something to save the effort ... and hit on
the unix workstation market (with the displaywriter follow-on morphing
into unix workstation). lots of unix workstation market place is very
numerical and power hungry ... somewhat as a result ... the followon to
ROMP for that market was large, power-hungry RIOS chipset (i.e. POWER,
announced in RS/6000).  Paperweight on my desk (from original) has six
chips, and says 150 million OPS, 60 million FLOPS, and 7 million
transistors.

somerset was combined ibm, motorola, apple project to do a single chip,
801 PC-level implementation ... the executive we reported to when we
were doing ha/cmp
http://www.garlic.com/~lynn/subtopic.html#hacmp

went over to head up somerset. part of somerset including infusing
power/pc with some of motorola's 88k (risc) technology. ROMP and RIOS
were single processer implementations with no provision for
multi-processor cache consistency. power/pc was going to be able to
support cache consistency and multiprocessor operation.

lots of past 801 posts
http://www.garlic.com/~lynn/subtopic.html#801

68k was still hanging in there in 89/90 time-frame ... a couple posts
with some old references from the period (raw chip volumes, business
analysis, etc)
http://www.garlic.com/~lynn/2005q.html#35 Intel strickes back with a parallel 
x86 design
http://www.garlic.com/~lynn/2005q.html#44 Intel strickes back with a parallel 
x86 design

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