Tom & Chris, Haven't looked at the thread for some time... a bit late now... What I meant was this... The bit signaling the line is x'80000000' which is the only reason why x'00000000 80000000' - x'00000000 00000001' is not addressable. IBM decided that using the Highest bit to do this signaling... the wastage I was referring to was virtual storage... which is probably not a wastage, except if it means that you might have to go to '00000000 00000000 00000000' a few years earlier because you have thrown away the addressability of the width of the bar... Because surely there is some sort of a cost involved in programming the addressability. My thinking, right or wrong was that if they used the lowest bit to do the signaling, they would have lost addressability to less.
Regards Herbie -----Original Message----- From: IBM Mainframe Discussion List [mailto:[EMAIL PROTECTED] On Behalf Of Tom Marchant Sent: 08 November 2007 07:43 nm To: [email protected] Subject: Re: CSA 'above the bar' On Thu, 8 Nov 2007 10:14:42 -0000, Van Dalsen, Herbie wrote: >Apologies, I keep on forgetting that the '8' just signals the above the >line, you and Tom and all the others are quite correct with the >x'7fffffff', I have it now... it is a pitty that IBM did not use the >lowest bit to signal the line... x'00000001' for 24-bit and x'00000002' >for 32-bit, it would have meant less wastage. Because you would have >lost the first few addresses... huh? What "wastage" are you talking about? I'd suggest that you read chapter 3 of the principles of operation. What do you mean about "signaling the line"? Are you referring to the bit in the PSW that tells the processor whether to operate in 24-bit mode or 31-bit mode? In 24-bit mode, addresses can go from 0 to x'FFFFFF'. In 31-bit mode, addresses can go from 0 to x'7FFFFFFF'. The line is simply a way of talking about storage locations that cannot be referenced in 24-bit mode In the 360 and 370 architecture (except for the 360-67), addresses were 24 bits, with a maximum possible value of FFFFFF. Because of wrap around, the bext byte after x'FFFFFF' was location 0. The 370-XA architecture allowed for 31 bit addresses. In 31-bit mode, the next byte after location x'FFFFFF' is x'1000000'. Note that it takes a minimum of 25 bits to represent that address. -- Tom Marchant ---------------------------------------------------------------------- For IBM-MAIN subscribe / signoff / archive access instructions, send email to [EMAIL PROTECTED] with the message: GET IBM-MAIN INFO Search the archives at http://bama.ua.edu/archives/ibm-main.html Elavon Financial Services Limited Registered in Ireland: Number 418442 Registered Office: Block E, 1st Floor, Cherrywood Business Park, Loughlinstown, Co. Dublin, Ireland Directors: Robert Abele (USA), John Collins, Terrance Dolan (USA), Pamela Joseph (USA), Declan Lynch, John McNally, Malcolm Towlson Elavon Financial Services Limited, trading as Elavon, is regulated by the Financial Regulator ---------------------------------------------------------------------- For IBM-MAIN subscribe / signoff / archive access instructions, send email to [EMAIL PROTECTED] with the message: GET IBM-MAIN INFO Search the archives at http://bama.ua.edu/archives/ibm-main.html
