The following message is a courtesy copy of an article that has been posted to bit.listserv.ibm-main,alt.folklore.computers as well.
[EMAIL PROTECTED] (Timothy Sipples) writes: > You have to be very careful about the System i numbers though, and > Loughridge explained this. When you buy a new system to run IBM i OS, > you are now increasingly buying System p branded servers. IBM is > phasing out separate branded hardware as the models get updated. (For > some years now the underlying hardware has been virtually identical > anyway -- the POWER microprocessors definitely -- but now it's > official.) So some of the System p sales are to run i OS (on the whole > server or part of the server), and reported System i sales reflect > only System i branded server models. That's my understanding anyway, > and I think that's reflected in the statement. long tortured road. i've periodically claimed that John's early effort on 801/risc was to go to the exact opposite in hardware complexity vis-a-vis what was happening in the future system project. future system was to completely replace mainframe ... and as radically different from 360/370 as 360 had been from prior generations. http://www.garlic.com/~lynn/subtopic.html#futuresys when future system project failed ... there was then mad rush to get stuff back into the 370 product pipeline (projects not going on because of the expectation of shift to FS). Eventually 801/risc thought it found a market niche to consolidate the corporation's large number of different (embedded) microprocessors on 801. The follow-on to 4341, the 4381 ... was initially going to be an (microprogrammed) 801 Iliad chip. The follow-on to s/38 (as/400) as also going to use 801 Iliad chip. Large number of other (embedded) microprocessors around the corporation was to all standardize on 801/risc. misc. old email mentioning 801, risc, and/or iliad http://www.garlic.com/~lynn/lhwemail.html#801 and past posts mentioning, 801, romp, rios, fort knox, power, power/pc, etc http://www.garlic.com/~lynn/subtopic.html#801 I contributed some sections to the white paper that helped kill the Iliad chip strategy for the 4381 ... basically technology was getting to the point that native 370 could almostly totally be implemented directly in a chip (as opposed to requiring a microprogrammed emulation layer) at much better price/performance. 801/risc Iliad chip ran into problems for AS/400 ... and there was crash program to do CISC chip for initial AS/400. However, a decade later, in era of (801/risc) power/pc chip ... AS/400 did move over. Not long after the decision to do a native 370 chip for 4381 (circa '85), I produced a series of documents for modular rack implementation accomodating arbitrary mix of native 370 chip boards and 801/risc Iliad chip boards ... where the racks were nominal branded as large cluster of 370s ... with the 801/risc Iliad chip boards handling specific application/function "offloads" (native code implementation, as opposed to running 370 microcode emulation). misc. past references http://ww.garlic.com/~lynn/2002l.html#27 End of Moore's law and how it can influence job market ..... http://www.garlic.com/~lynn/2004m.html#17 mainframe and microprocessor In the above, I was hoping for possibly 80 processor boards in a rack. i would claim that the work on medusa (cluster-in-a-rack) ... several years later ... was essentially the same thing ... but w/o 370 chip boards. medusa started out with 32 processors per rack ... old email http://www.garlic.com/~lynn/lhwemail.html#medusa as part of scaleup for ha/cmp effort http://www.garlic.com/~lynn/subtopic.html#hacmp also mentioned in this meeting ... looking to have four rack medusa (128-processors) by ye92 http://www.garlic.com/~lynn/95.html#13 ---------------------------------------------------------------------- For IBM-MAIN subscribe / signoff / archive access instructions, send email to [EMAIL PROTECTED] with the message: GET IBM-MAIN INFO Search the archives at http://bama.ua.edu/archives/ibm-main.html
