On Thu, 5 Mar 2009 20:30:20 -0500 Jim Mulder <[email protected]> wrote:

:>IBM Mainframe Discussion List <[email protected]> wrote on 03/05/2009 
:>01:47:25 PM:

:>> On Thu, 5 Mar 2009 10:31:55 -0600 Walt Farrell <[email protected]> 
:>wrote:
 
:>> :>On Thu, 5 Mar 2009 16:00:35 +0200, Binyamin Dissen
:>> :><[email protected]> wrote:
:>> :>
:>> :>>I am getting a PIC-4/S0c4 in IEANUC01.IEATTIME+04FE with the PSW in 
:>31 bit
:>> :>>mode. Backtracking in the dump I see it doing an EREG 1,1 when 
:>itshould be
:>> :>>doing an EREGG if it supports 64bit.
:>> :>
:>> :>According to the book, only a limited set of MVS assembler programming
:>> :>services support invocation in 64-bit addressing mode, and only a more
:>> :>limited set of the services support parameters above the bar.
:>> :>
:>> :>See
:>> :>http://publibz.boulder.ibm.com/cgi-
 
:>bin/bookmgr_OS390/BOOKS/IEA2A990/1.2?SHELF=EZ2ZO10L&DT=20080601235844&CASE=
:>> :>
:>> :>or http://preview.tinyurl.com/b9alno
 
:>> Maybe I am missing something obvious, but what is the big deal in that a 
:>PC
:>> routine supports a 64 bit caller if it can't support 64 bit parameters?

:>  I did not see anything in the book which makes judgements as to what
:>is or is not a "big deal".  The book simply states facts about interfaces.

:>  In many cases, an SVC or Stacking PC routine can support a 64-bit 
:>addressing mode caller without any changes to the routine. 

Wouldn't that be in all cases? I don't see anything in the definition of an
SVC or stacking-PC where one would specify that the caller is allowed (or not
allowed) to be 64bit.

:>Supporting 64-bit parameters usually requires significant changes to 
:>the routine. 

Obviously. 

--
Binyamin Dissen <[email protected]>
http://www.dissensoftware.com

Director, Dissen Software, Bar & Grill - Israel


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