On Tue, 18 Dec 2012 18:40:06 -0500, Gerhard Postpischil wrote: >Timing information for a single instruction is pretty >meaningless these days, but it is possible to produce a worst time (no >instruction overlap, no cache hit, etc.) and a best time.
Best case for a Load instruction is probably one clock cycle. Depending on what other instructions are near it, one or two other instructions might also execute in the same clock cycle. If the data is not in cache, I understand that it will take about 850 clock cycles. If the data to be loaded crosses cache lines, it could be double that, or 1700 clock cycles. If there is no entry in the TLB for the virtual address, five more memory references will each require from 1 to 850 clock cycles each, for a total of an additional 5250 clock cycles. What is the value of that kind of information? >SHARE or a >similar organization, if not IBM, could develop a standard job stream >for different environments As Ted wrote, IBM does that kind of testing with LSPR. -- Tom Marchant ---------------------------------------------------------------------- For IBM-MAIN subscribe / signoff / archive access instructions, send email to [email protected] with the message: INFO IBM-MAIN
