https://searchdatacenter.techtarget.com/tip/The-first-steps-to-use-SIMD-instructions-on-mainframes
On Tue, Oct 19, 2021 at 9:27 AM Charles Mills <[email protected]> wrote: > 1. With regard to the zPDT, can't you configure what hardware to emulate? > For example, I might want to test my software that catches vector > exceptions > and simulates the instruction in software. > > 2. With regard to examples -- I just looked at the PoOps. Wow! Dense, and > few or no examples. > > Charles > > > -----Original Message----- > From: IBM Mainframe Discussion List [mailto:[email protected]] On > Behalf Of Phil Smith III > Sent: Monday, October 18, 2021 10:43 PM > To: [email protected] > Subject: Re: Vector examples? > > Charles, thanks-I did find that, but that's pseudo-assembler and I can't > find equates for the vector registers anywhere (coulda > missed them, of course). > > > > Shmuel, that was my first thought, but I'd expect to get a S0C1 not a S0C7, > I *think*, per the doc. > > > > This is running on a zPDT, where I doubt they'd NOT have the vector stuff, > since it's just emulation. > > > > > > > ---------------------------------------------------------------------- > For IBM-MAIN subscribe / signoff / archive access instructions, > send email to [email protected] with the message: INFO IBM-MAIN > > ---------------------------------------------------------------------- > For IBM-MAIN subscribe / signoff / archive access instructions, > send email to [email protected] with the message: INFO IBM-MAIN > -- Politics: Poli (many) - tics (blood sucking parasites) ---------------------------------------------------------------------- For IBM-MAIN subscribe / signoff / archive access instructions, send email to [email protected] with the message: INFO IBM-MAIN
