Sure. And given that the high 32 bits are required to be 0,
by convention, which is why I mentioned the use of LA on
each undefined register on entry, the computation is:

0 + 0 = 0

Just what the doctor ordered.

BFN. Paul.




On Thu, 2 Feb 2023 23:10:47 +0000, Seymour J Metz <sme...@gmu.edu> wrote:

>"The address computa- tion follows the rules for address arithmetic."
>
>In AM64 that means that the base and index are 64 bits.
>
>
>--
>Shmuel (Seymour J.) Metz
>http://mason.gmu.edu/~smetz3
>
>________________________________________
>From: IBM Mainframe Discussion List [IBM-MAIN@LISTSERV.UA.EDU] on behalf of 
>Paul Edwards [mutazi...@gmail.com]
>Sent: Thursday, February 2, 2023 5:59 PM
>To: IBM-MAIN@LISTSERV.UA.EDU
>Subject: Re: GETMAIN LOC=32
>
>On Thu, 2 Feb 2023 14:45:31 -0800, Ed Jaffe <edja...@phoenixsoftware.com> 
>wrote:
>
>>On 2/2/2023 2:36 PM, Paul Edwards wrote:
>>> But on top of that, I was looking for a z/OS change to
>>> guarantee the high halves were zero. And the new
>>> information is that I don't need that guarantee. I can
>>> make my S/370 applications "more-properly-written"
>>> by taking clear of clearing the high halves themselves,
>>> without being dependent on z/OS.
>>
>>We take exactly the opposite approach because we have been "burned."
>>
>>We set Traps(IeaInitArSrb,IeaInitRegsTask) in DIAGxx to ensure the
>>operating system puts garbage in the ARs and the high halves.
>>
>>That way we won't accidentally develop code that depends on these
>>registers being pre-initialized to zero.
>
>Ok, that sounds like a good idea, and again, LA (a S/370
>instruction) should cope with clearing that garbage, so that
>a "properly-written" (or maybe "appropriately-written") S/370
>program can protect itself while running in AM64.
>
>BFN. Paul.
>
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