No, it's the interrupt code; I would expect it to be the SVC number for the 
normal case. The text in the mapping isn't very clear, so snoop around a bit. 
For a normal ABEND the ABEND code and reason code should be in the SVRB for SVC 
0D (13). For an 0Cx/0Dx, it's a bit different.

Are you just concerned with explicit ABEND macros, or ABTERM in general?
--
Shmuel (Seymour J.) Metz
http://mason.gmu.edu/~smetz3
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________________________________________
From: IBM Mainframe Discussion List <IBM-MAIN@LISTSERV.UA.EDU> on behalf of 
Joseph Reichman <reichman...@gmail.com>
Sent: Monday, November 27, 2023 11:49 AM
To: IBM-MAIN@LISTSERV.UA.EDU
Subject: Re: Abend producing SDWARBAD

That’s the abend code right ?

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From: IBM Mainframe Discussion List <IBM-MAIN@LISTSERV.UA.EDU> on behalf of 
Seymour J Metz <sme...@gmu.edu>
Sent: Monday, November 27, 2023 11:47:55 AM
To: IBM-MAIN@LISTSERV.UA.EDU <IBM-MAIN@LISTSERV.UA.EDU>
Subject: Re: Abend producing SDWARBAD

Is RBRTINCD at offset -E in the SVRB what you need? See IHARB for the mapping. 
It includes the prefix.


--
Shmuel (Seymour J.) Metz
http://mason.gmu.edu/~smetz3
עַם יִשְׂרָאֵל חַי



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From: IBM Mainframe Discussion List <IBM-MAIN@LISTSERV.UA.EDU> on behalf of 
Joseph Reichman <reichman...@gmail.com>
Sent: Monday, November 27, 2023 11:08 AM
To: IBM-MAIN@LISTSERV.UA.EDU
Subject: Re: Abend producing SDWARBAD

Seymour thank you

I would like to update file 192 with this scenario

It has happened to me often

Just last night when I tried to produce this

Test case was not able to

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From: IBM Mainframe Discussion List <IBM-MAIN@LISTSERV.UA.EDU> on behalf of 
Seymour J Metz <sme...@gmu.edu>
Sent: Monday, November 27, 2023 11:06:05 AM
To: IBM-MAIN@LISTSERV.UA.EDU <IBM-MAIN@LISTSERV.UA.EDU>
Subject: Re: Abend producing SDWARBAD

Yes, and when it's an SVRB you have convenient access to the registers at the 
time the SVC was issued. That may be more helpful than the registers at the 
time of failure.

--
Shmuel (Seymour J.) Metz
http://mason.gmu.edu/~smetz3
עַם יִשְׂרָאֵל חַי



________________________________________
From: IBM Mainframe Discussion List <IBM-MAIN@LISTSERV.UA.EDU> on behalf of 
Joseph Reichman <reichman...@gmail.com>
Sent: Monday, November 27, 2023 10:55 AM
To: IBM-MAIN@LISTSERV.UA.EDU
Subject: Re: Abend producing SDWARBAD


I know that the SDWARBAD can point to a SVRB, PRB ,IRB

Typically though not always it’s a SVRB or else SDWANAME would be populated

I don’t profess to have your kind of knowledge
In this

But I do have somewhat of an idea what to look for

Thanks

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From: IBM Mainframe Discussion List <IBM-MAIN@LISTSERV.UA.EDU> on behalf of 
Seymour J Metz <sme...@gmu.edu>
Sent: Monday, November 27, 2023 10:50:32 AM
To: IBM-MAIN@LISTSERV.UA.EDU <IBM-MAIN@LISTSERV.UA.EDU>
Subject: Re: Abend producing SDWARBAD

An SVRB is not a PRB. There is a mapping macro. In addition to the old PSW, an 
SVRB contains the general registers at the time of SVC invocation.


--
Shmuel (Seymour J.) Metz
http://mason.gmu.edu/~smetz3
עַם יִשְׂרָאֵל חַי



________________________________________
From: IBM Mainframe Discussion List <IBM-MAIN@LISTSERV.UA.EDU> on behalf of 
Joseph Reichman <reichman...@gmail.com>
Sent: Monday, November 27, 2023 10:03 AM
To: IBM-MAIN@LISTSERV.UA.EDU
Subject: Re: Abend producing SDWARBAD

I have been asked to update file 192 on cbttape

File 192 is a general recovery program

The easiest abend to deal with is that where the error PSW

Is whitin your program

Besides updating with 64 bit support

I would like to update in a case where the error PSW does NOT point to anywhere 
whitin program

Typically though not always in this case the SDWARBAD is populated

Truth is throughout all the share sessions

On recovery which I have seen online this type of scenario is not discussed

Probably because dealing with it is very complex

I would like to determine where whitin the user code the IBM service was called 
going through this will definitely help me command of the TCB/rb/cde chains and 
different type of rb

Where information is stored for SVRB PRB’s

( such as the last few bytes of the prefix telling you what SVC was called by 
the PRB and abend code )

Thank you

> On Nov 27, 2023, at 9:36 AM, Peter Relson <rel...@us.ibm.com> wrote:
>
> I have no comment on what you say is a "hang".
>
> Here's a simple example that does abend and does place an RB address in 
> SDWARBAD and does not retry (so that your recovery gets control). It assumes 
> AMODE 31 or AMODE 64 (since for AMODE 24 it would use the address x'FFF000' 
> which is valid).
>         LLILF 15,x'7FFFF000'
>         SVC 42
>
> If assembled as
> TEST     CSECT
> TEST     AMODE 31
>         LLILF 15,x'7FFFF000'
>         SVC 42
>         END
> And linkedited, then
> TEST my.loadlib(TEST)
> TEST
> go
> IKJ56641I TEST     ENDED DUE TO ERROR
> IKJ56640I SYSTEM ABEND CODE 0C4   REASON CODE 00000011
> TEST
>
> And using TEST on a more complete program with an ESTAEX in effect at the 
> time of the SVC 42 and setting a breakpoint at the ESTAEX routine does get 
> control at the ESTAEX routine, where +x'58' into the SDWA has the RB address. 
> And you get similar results with a type 2 SVC such as SVC 122-9 (setting reg 
> 1 to the bad value for that case)
>
> If you are truly hanging, then you have again omitted important details.
>
> What is it that you are intending to do with "SDWARBAD"?
>
> Peter Relson
> z/OS Core Technology Design
>
>
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