I did not answer your question about " What's the fastest way one processor can signal the other? Spinning on a storage content? Then a cache fault might provide sufficient delay to guarantee consistency." because I did not know how that is implemented in current machines. I asked today, and the answer is that
There is special handling of the store operand of a STCK in order to make sure that the store is not released until the TOD bit above the CPU number ticks. Thus if another CPU tries to observe the value stored by a STCK (or anything else in that cache line that contains the STCK operand), it is delayed, because it cannot obtain read access to the cache line until the relevant TOD bit ticks. So that's another performance reason to avoid using STCK. In addition to delaying the CPU issuing STCK if it is soon after another STCK on the same CPU, it can also delay other CPUs from subsequently accessing the cache line that contains the STCK operand. Jim Mulder -----Original Message----- From: IBM Mainframe Discussion List <IBM-MAIN@LISTSERV.UA.EDU> On Behalf Of Paul Gilmartin Sent: Tuesday, February 27, 2024 9:02 PM To: IBM-MAIN@LISTSERV.UA.EDU Subject: Re: Nanosecond resolution timestamps for HLL's? On Tue, 27 Feb 2024 16:46:00 -0600, Jon Perryman wrote: >On Sat, 24 Feb 2024 19:50:32 +0000, Jim Mulder wrote: > >>STCK, which inserts a processor related value in the low order bits to meet >>the "unique with a partition" requirement. > You (carefully) avoided making any representation about multiple partitions. And a "processor related value" can guarantee uniqueness but not monotonicity: Suppose a processor with a higher value does STCK. On detecting this, a processor with a lower value does its own STCK before the clock changes. Clearly the value stored later and differing only in the "processor related value" will be algebraically less. The PoOps guarantees no such inconsistency will be detectable. "detectable" is a tricky word. Schrödinger's cat comes to mind: if you can't see it, you can't say it happened. What's the fastest way one processor can signal the other? Spinning on a storage content? Then a cache fault might provide sufficient delay to guarantee consistency. >If there's not a simple answer, I'll take your word this is monotonic, Out of >curiosity, what is the precision of STCK and how does it guarantee monotonic >time? In other words, how does STCK distinguish between 10 STCK's on the same >CPU in the same partition within 49 microseconds? Multiply 244 picoseconds >(TOD bit 63) by 200 CPU IDs, STCK precision is 49 microseconds. With a 5Ghz >Telum processor, single cycle instructions take 191 picoseconds which means a >single CPU can potentially execute 256 instructions during that 49 microsecond >timeframe. -- gil ---------------------------------------------------------------------- For IBM-MAIN subscribe / signoff / archive access instructions, send email to lists...@listserv.ua.edu with the message: INFO IBM-MAIN ---------------------------------------------------------------------- For IBM-MAIN subscribe / signoff / archive access instructions, send email to lists...@listserv.ua.edu with the message: INFO IBM-MAIN
