To answer "how can you tell", another TCB will see a partial move for MVCL
while only the complete move is seen for MVC.  Rather important for some
multi-tasking code.  On some older machines such as CMOS the partial move
was on a cache line boundary, so by block but not predictable.  Don't know
for current hardware, where cache management is much more sophisticated.
Made for some interesting bugs for pre-z.

On Sat, Jul 27, 2024 at 7:35 AM Paul Gilmartin <
[email protected]> wrote:

> On Fri, 26 Jul 2024 16:03:40 -0500, Mike Schwab wrote:
>
> >MVC has another exemption.  The entire 256 bytes appear to move at
> >once.
> >
>  How can you tell?  How might this "appear" different from moving
> sequentially?  Was that true even on the earliest s/360?  Is that
> to say that the move appears "block concurrent"?
>
> >   ... Vs MVCL appears to move 1 byte at a time with register updates.
>
> --
> gil
>
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