The documentation about what it does is here:

https://www.ibm.com/docs/en/zos/3.1.0?topic=overview-address-space-layout-randomization

Jim Mulder

-----Original Message-----
From: IBM Mainframe Discussion List <[email protected]> On Behalf Of 
Mark Jacobs
Sent: Monday, September 9, 2024 9:57 PM
To: [email protected]
Subject: Re: 24-bit private region on z16 processor

That's it. Yes. These systems do have ASLR active. I didn't realize that once 
its enabled we can expect what I'm seeing. Is that documented anywhere?

Mark Jacobs 


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On Monday, September 9th, 2024 at 8:19 PM, Jim Mulder <[email protected]> 
wrote:

> I would expect that if Address Space Layout Randomization is active.
> 
> Is ASLR(YES) specified in DIAGxx?
> 
> The D DIAG command, or VERBX IGVDGNIP under IPCS, will tell you.
> 
> Jim Mulder
> 
> -----Original Message-----
> From: IBM Mainframe Discussion List [email protected] On Behalf 
> Of Mark Jacobs
> 
> Sent: Monday, September 9, 2024 6:16 PM
> To: [email protected]
> Subject: Re: 24-bit private region on z16 processor
> 
> I'm 99% sure those parameters aren't in any of the systems where I'm being 
> weirded out as it relates to where low private begins when I look at it using 
> SDSF VMAP, but I'll check tomorrow.
> 
> Mark Jacobs
> 
> Sent from ProtonMail, Swiss-based encrypted email.
> 
> GPG Public Key - 
> https://api.protonmail.ch/pks/lookup?op=get&search=markjacobs@protonma
> il.com
> 
> 
> 
> 
> On Monday, September 9th, 2024 at 4:40 PM, Allan Staller 
> [email protected] wrote:
> 
> > Classification: Confidential
> > 
> > "Low Core" generally extend up to about x'6000' (give or take). This is the 
> > start of low private.
> > V=R and ADDRSPC storage IIRC is just above this so actual "low private" may 
> > start (e.g. x'8000') depending on values for V=R and ADDRSPC=REAL stoarge.
> > 
> > FWIW, these 2 parameters date from "day 1" of virtual storage and are 
> > probably useless in this day and age.
> > If they are still present in IEASYSxx, I would suggest removing them when 
> > convenient.
> > 
> > HTH,
> > 
> > -----Original Message-----
> > From: IBM Mainframe Discussion List [email protected] On 
> > Behalf Of Mark Jacobs
> > 
> > Sent: Monday, September 9, 2024 3:05 PM
> > To: [email protected]
> > Subject: Re: 24-bit private region on z16 processor
> > 
> > [CAUTION: This Email is from outside the Organization. Unless you 
> > trust the sender, Don’t click links or open attachments as it may be 
> > a Phishing email, which can steal your Information and compromise 
> > your Computer.]
> > 
> > I'm not talking about the top of the 24-bit private region, I'm looking at 
> > the beginning/bottom of the region and it's starting all over the place.
> > 
> > Mark Jacobs
> > 
> > Sent from ProtonMail, Swiss-based encrypted email.
> > 
> > GPG Public Key -
> > https://api.protonmail.ch/pks/lookup?op=get&search=markjacobs@proton
> > ma
> > il.com
> > 
> > On Monday, September 9th, 2024 at 2:30 PM, Mike Schwab 
> > [email protected] wrote:
> > 
> > > Varies by operating system level occasionally PTF, and user 
> > > configuration such as TSO in (non-)LPA area.
> > > 
> > > On Mon, Sep 9, 2024 at 8:25 AM Mark Jacobs 
> > > [email protected] wrote:
> > > 
> > > > Silly question. Is there anything different as it relates to sizing of 
> > > > the 24-bit private region on z16 processors?
> > > > 
> > > > Mark Jacobs
> 
> 
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