On Tue, 22 Oct 2024 12:30:42 -0400 Tony Harminc <[email protected]> wrote:

:>On Tue, 22 Oct 2024 at 07:30, Seymour J Metz <[email protected]> wrote:

:>> R1 designates an even/odd pair. However, the 256-byte alignment
:>> requirement makes this less attractive.

:>Ah yes, I had forgotten about that. And I shouldn't have, because I got
:>burned by it when using TROT a few years ago. I have no idea why IBM
:>would've designed it to silently ignore an incorrect boundary rather than
:>giving a specification exception.

"The rightmost bits of the register that are not used to form the address,
which are bits 61-63 in the doubleword case and bits 52-63 in the 4 K-byte
case, are ignored but should contain zeros; otherwise, the program may not
operate compatibly in the future."

Seems like sometimes IBM ignores the unused bits and in other cases generates
an exception - such as MVST which documents

"The ending character to be used to determine the end of the second operand is
specified in bit positions 56-63 of general register 0. Bit positions 32-55 of
general register 0 are reserved for possible future extensions and must
contain all zeros; otherwise, a specification exception is recognized."

--
Binyamin Dissen <[email protected]>
http://www.dissensoftware.com

Director, Dissen Software, Bar & Grill - Israel

----------------------------------------------------------------------
For IBM-MAIN subscribe / signoff / archive access instructions,
send email to [email protected] with the message: INFO IBM-MAIN

Reply via email to