The upper half of R14 is irrelevant for BSM 0,14 when the target AMODE *of
the BSM instruction* is 24 or 31.
The target AMODE of BSM 0,14 is 24 or 31 exactly when bit 63 (the low order
bit of the low order half) of R14 is zero.
Therefore, as I said, the upper half of R14 is irrelevant for BSM 0,14 when
the target AMODE *of the BSM instruction* is 24 or 31.
LINK/LINKX/ATTACH/ATTACHX always set bit 63 of R14 to 0 precisely so that the
target module of the LINK/LINKX/ATTACH/ATTACH can easily use either BR 14 or
BSM 0,14 to return.
If the return from the LINK/LINKX/ATTACH/ATTACHX target module is via BR 14
then an AMODE 64 issuer of BR 14 must restore the high order half (bits 0-31)
of R14 (or set the high order half of R14 to 0).
If the return from the LINK/LINKX/ATTACH/ATTACHX target module via BSM 0,14
then the AMODE of the issuer of BSM 0,14 does not matter, because bit 63 of R14
is 0. The contents of the high order half (bits 0-31)
of R14 does not matter, because bit 63 of R14 is 0.
There is no ambiguity in the meaning of bit 31 of a register in zArchitecture
POPS. It always means the low order bit of the high order half of the
register. POPS never refers to bit 32 of a register as bit 31.
The BSM description in POPS does not say anything about bit 31 in the second
(R2) register. It does talk about bit 31 of the current and resulting PSWs,
which is the EA bit, which indicates Extended Addressing (64-bit addressing
mode).
LINK/LINKX/ATTACH/ATTACHX always set the high order half (bits 0-31) of
register 14 of to 0. When the LINK/LINKX/ATTACH/ATTACHX documentation refers
to the high order bit of register 14, it means the high order bit of
the low order half (i.e. bit 32 of the 64-bit register). The documentation
update will be more explicit about those things.
I do not expect the updated documentation to recommend BR 14 vs BSM 0,14. It
will simply be more explicit about the contents of register 14 so that the
readers can make an informed choice which meets their needs.
Jim Mulder
-----Original Message-----
From: IBM Mainframe Discussion List <[email protected]> On Behalf Of Jon
Perryman
Sent: Monday, August 18, 2025 11:58 PM
To: [email protected]
Subject: Re: RMODE 64
On Tue, 19 Aug 2025 01:35:52 +0000, James Mulder <[email protected]> wrote:
> The upper half of R14 is irrelevant for BSM 0,14 when the target
> AMODE is 24 or 31.
>
>and bit 63 of the register is zero,
Your doc snip says bit 63 must be 0 which means the upper half of R14 is
relevant and R14 must be completely restored (64-bit). If you don't restore it
and bit 63 is a 1, then you have an invalid 64 bit address.
> Bit 32 means bit 32 of the 64 bit register (with bits numbered from
> 0-63), which is the high order bit of the low order half of the register.
I mentioned bit 32 being bit 31 for others because they are accustomed to POPS
which refers to this as bit 31 as seen in your POPS snippet.
>When the contents of general register R2 are used and bit 63 of the
>register is zero, bit 31 of the current PSW, the
>extended-addressing-mode bit, is set to zero, bit 32 of the register
>specifies the new basic addressing mode and replaces bit 32 of the PSW,
With your BSM snippet from the POPS and the R14 doc from LINKX, would an
average person figure out how to BSM R14 with new documentation? You could just
document BR R14 because you know it works for all AMODES and forget about BSM
because it's harder for average people to use.
>When the caller is AMode 31 or 64, the high order bit of R14 is 1 when
>the target module is AMode 24 or 31, and 0 when the target module is
>AMode 64.
Bit 63 is relevant to BSM as documented in your POPS BSM snip. Your tests
ignored the upper half of R14 which must be either x'80000000' or x'00000000'
otherwise BR R14 would abend in AMODE64. Probably the first, which identifies
AMODE64 and begs the question why R15 when callers AMODE64 is bit 63 of R14.
> I will submit a documentation update
This will make Binyamin and others extremely happy. Many thanks for the
excellent work.
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