Charles wrote: "XR over SR seems to be a persistent myth. I have been told again and again from time to time that XR was faster than SR. There is no reason it should be, and the evidence is that it is not."
IMHO, there are very good reasons why XR *might* be faster than SR *in the general case(!)*: For SR r1,r2, one must allow for: - borrow propagation (even in a parallel adder), - the low order bits may have to be fetched, processed, and put-away before the higher-order bits, and - the condition code cannot be set until the last, high-order bit is processed. Therefore, it makes sense that the hardware designers might recognize the special case of r1 = r2 for either(both) instruction(s). Given the points in my first paragraph, and that some machines might not recognized the special case, it appears that recognizing the r1 = r2 case for SR, but not XR, is extremely poor in human factors: Aside from the confusion that this brings up over and over, neither instruction choice can be relied upon to be as fast or faster on all machines. That said, pipelining makes the issue minor (dare I say truly trivial?). Out-of-order execution makes it all but moot. Finally, whenever I had time to think about it I used to use XR r1,r1 to zero a register, not because it was any faster, but that it showed (to me) intent. For some time now, I have been using LHI r1,0, because it does not change the condition code, and therefore can be moved more widely without breaking something. I would also venture that it will never be subject to out-of-order retries due to operand unavailability. Depending on how smart the micro-code is, XR and SR might have to wait for the previous value of r1 to be put-away (and condition code set) before starting the XR or SR. Have I stirred up this hornets' nest enough? 8-) Just my two cents. On Tue, Jun 3, 2014 at 2:03 PM, John McKown <[email protected]> wrote: > On Tue, Jun 3, 2014 at 7:54 AM, Charles Mills <[email protected]> wrote: > > > XR over SR seems to be a persistent myth. I have been told again and > again > > from time to time that XR was faster than SR. There is no reason it > should > > be, and the evidence is that it is not. > > > > Even back in the olden days of yore, I don't understand why one RR > instruction which uses the ALU would be any faster than another. Especially > back in the days when it was basically all hardware. Even today, most of > the ALU based RR instructions are likely "hard wired". If not, I really > wonder why. > > > > Charles > > > -- > There is nothing more pleasant than traveling and meeting new people! > Genghis Khan > > Maranatha! <>< > John McKown > > ---------------------------------------------------------------------- > For IBM-MAIN subscribe / signoff / archive access instructions, > send email to [email protected] with the message: INFO IBM-MAIN > -- OREXXMan ---------------------------------------------------------------------- For IBM-MAIN subscribe / signoff / archive access instructions, send email to [email protected] with the message: INFO IBM-MAIN
