On Fri, 26 Feb 2016 12:06:38 +0530, Robert Hahne wrote: >In MVS/XA , with prefixing, the processors did not use absolute locations >0-4095. Rather, each
It has nothing to do with MVS/XA. First, prefixing is a hardware function. Second, prefixing as we know it today has existed since 1974. In z/Architecture it was changed to work for the first 8K rather than 4K. In fact, prefixing was active on the earliest System/360 processors as well, but the Set Prefix Instruction appears to have been new in the -4 edition of the System/360 Principles of Operation, with a publication date of September, 1974. Absolute page zero has always been and still are used for STORE STATUS and for IPL. >Whenever the processor uses an address between 0 and 4095, >the hardware adds the the contents of the prefix register to the >address and uses the result. You can think of it that way, but the operation is not an addition, but a replacement of the upper bits of the address. In addition, when an instruction references a storage location whose upper bits match the prefix register, those bits are replaced with 0. This last function of prefixing was not implemented on System/360 or the earliest system/370 models. When I write "upper bits" I mean bits 8-19 for System/360 bits 1-19 for 370/XA and ESA bits 0-50 for z/Architecture -- Tom Marchant >> >> On Thu, 25 Feb 2016 07:39:30 +0100, Peter Hunkeler wrote: >> >> >The 8 KiB area at absolute 0 is the place where the hardware writes >> >status information as result of performing the "Store Status" operation. ---------------------------------------------------------------------- For IBM-MAIN subscribe / signoff / archive access instructions, send email to [email protected] with the message: INFO IBM-MAIN
