On Fri, 10 Jun 2016 14:39:35 -0700, Andr é Schoeman wrote: >Note that all the GPR's in the issuing code are purified to contain "clean" >31-bit addresses >before the IEAMSCHD is issued.
That's not good enough. Your SRB routine, which received control in 31-bit mode cannot make any assumptions about the high halves of the registers. >As of late (I suspect since z/OS V2R1), the high halves (bits 0-31) of all >GPRs, and the ARs, >contain x'FFFFFFFF' when the SRB routine is entered (the routine is scheduled >in KEY=0 >with PASN=SASN=HASN), even if (in the case of the GPRs) bits 32-63 is zero. As Ed pointed out, this is a DIAG trap that is intended to help you to find errors in your code where you assume that the high halves are zero when they may not be. -- Tom Marchant. ---------------------------------------------------------------------- For IBM-MAIN subscribe / signoff / archive access instructions, send email to [email protected] with the message: INFO IBM-MAIN
